1. Field of the Invention
The present invention generally relates to a semiconductor integrated circuit. In particular, the present invention relates to a power source voltage generating circuit stored in a semiconductor integrated circuit and a method of testing the same.
2. Related Background Art
In a dynamic random access memory (DRAM) that is a memory element for accumulating electric charge in a capacitative element provided at an intersection of a bit line and a word line and recording information, a power source voltage tends to be lowered along with miniaturization of a circuit.
Thus, the capacity of a DRAM tends to decrease in accordance with a reduction in its size. Since the amount of electric charge accumulated in a capacitative element also decreases in a read or write operation, in order to provide sufficient margins to the read or write operation by reducing the influence of a leak, a memory circuit widely is used in which a potential of a bit line is set to be a half of a power source voltage VDD after a read or write operation is completed.
FIG. 13 is a structural view of a representative power source voltage generating circuit typically used for the purpose of generating a half of a power source voltage VDD. In FIG. 13, based on a reference potential VM produced by resistors R1 and R2 and transistors Q1 and Q2, potentials applied to gates of transistors Q3 and Q4 are represented by (VM+VT) and (VMxe2x88x92VT), respectively, where VT is a threshold voltage of the transistors Q1 and Q2.
In the power source voltage generating circuit, since the gate voltages of the transistors Q3 and Q4 are constant, currents Ids3 and Ids4 flowing through the transistors Q3 and Q4 are represented by the following Formula 1.
Ids3=(xcex2/2)xc2x7(W/L)xc2x7(VMxe2x88x92VBP)2
Ids4=xe2x88x92(xcex2/2)xc2x7(W/L)xc2x7(VMxe2x88x92VBP)2xe2x80x83xe2x80x83(1)
Therefore, when a voltage of an output VBP is equal to the reference voltage VM, relationships, Ids3=0 and Ids4=0 are satisfied, whereby the circuit becomes stable. Since a voltage between a gate and a source of the output stage transistor Q3 or Q4 varies while maintaining the relationship of the Formula 1 with respect to an increase or decrease in the voltage VBP, the voltage of the output VBP is raised or lowered by currents supplied from the power source voltage VDD or VSS, so that a potential of the output VBP is kept constant.
However, in the above-described power source voltage generating circuit, since the gate voltages applied to the output stage transistors Q3 and Q4 are constant, the amount of variation in the currents that can be provided due to the change in the voltage between the gate and the source is not large enough. Thus, transient response characteristics are not so good.
In order to improve the transient response characteristic, the capabilities of the output stage transistors Q3 and Q4 are required to increase. In order to realize this, a method of widening the areas of the output stage transistors Q3 and Q4 might be considered first.
However, the above-described method causes problems: (1) an increase in the area of the power source voltage generating circuit itself and (2) an increase in the amount of currents consumed by the power source voltage generating circuit along with the increase in the area thereof.
FIG. 14 is a graph showing a relationship between the output voltage VBP and a current capability IBP of an output buffer. When the areas of the output stage transistors Q3 and Q4 are represented as s(Q3) and s(Q4) respectively, in Q3xe2x80x2 and Q4xe2x80x2 that are varied in area from the output stage transistors Q3 and Q4 (varied from W to Wxe2x80x2 in gate length and from L to Lxe2x80x2 in gate width), the current IBP is (Wxe2x80x2/W)xc2x7(L/Lxe2x80x2) times so that the current capability is improved. However, since a leak current Ileak also increases at the same time, it is apparent that the current capability does not necessarily increase effectively with the increase in the area.
As described above, a bit line precharge power source voltage generating circuit typically used is required to improve the transient response characteristic, but in order to realize this without increasing a layout area thereof excessively, the output stage transistors that supply currents for bringing the voltage back to a predetermined value with respect to the change in the output VBP are required to define a circuit capable of flowing currents positively.
Therefore, with the foregoing in mind, it is an object of the present invention to provide a semiconductor integrated circuit capable of improving a transient response characteristic without increasing a layout area of a power source voltage generating circuit and a method of testing the same.
To achieve the above object, the semiconductor integrated circuit of the present invention includes a functional circuit and a power source voltage generating circuit used for operating the functional circuit. In the power source voltage generating circuit, transistors are driven in which output stages are formed by a pair of differential amplifiers receiving reference voltages having a minute voltage difference at an action point, and in a differential amplifier other than the pair of the differential amplifiers, a reference voltage other than those input to the pair of differential amplifiers is compared with an output voltage from the corresponding transistor among the transistors in their amount.
Because of the above-mentioned construction, when the output voltage varies minutely or sharply, each operating amplifier can be adopted according to either case, whereby it becomes possible to bring the voltage back to a predetermined value with respect to the change of a voltage in a short time.
In the semiconductor integrated circuit of the present invention, it is preferable that the power source voltage generating circuit includes a first resistor, a second resistor, a third resistor, and a fourth resistor connected in series to one another, as well as a first differential amplifier, a second differential amplifier, and a third differential amplifier, and a first transistor, a second transistor, and a third transistor. The first resistor connects a terminal on the opposite side of that connected to the second resistor to a first power source potential and the fourth resistor connects a terminal on the opposite side of that connected to the third resistor to a ground potential. Gate terminals of the first transistor, the second transistor, and the third transistor are connected to output terminals of the first differential amplifier, the second differential amplifier, and the third differential amplifier respectively. Drain terminals of the first transistor, the second transistor, and the third transistor are connected to either the first power source potential or the ground potential. Source terminals of the first transistor, the second transistor, and the third transistor are connected to an output terminal. One input terminal of each of the first differential amplifier, the second differential amplifier, and the third differential amplifier is connected to the output terminal, the other input terminal of the first differential amplifier receives a first reference voltage produced between the first resistor and the second resistor, the other input terminal of the second differential amplifier receives a second reference voltage produced between the second resistor and the third resistor, and the other input terminal of the third differential amplifier receives a third reference voltage produced between the third resistor and the fourth resistor.
Since a gate voltage of a transistor supplying currents in order to generate a predetermined power source voltage can be varied, when the output voltage varies from a predetermined value, the capability of supplying currents largely can be changed. Since a reference voltage of each differential amplifier is varied, a voltage region easily can be produced in which currents are not consumed, whereby it becomes possible to suppress consumption currents during an operation of the power source voltage generating circuit or abnormal variation of the production of the semiconductor circuit.
In the semiconductor integrated circuit of the present invention, it is preferable that the power source voltage generating circuit includes n resistors (n is a natural number) connected in series to one another, (nxe2x88x921) differential amplifiers disposed between the continuous resistors and (nxe2x88x921) transistors corresponding to the differential amplifiers respectively. Among the n resistors connected in series to one another, terminals of the resistors disposed on both ends connect terminals not connected to the other resistors to the first power source potential and the ground potential respectively. In each of the differential amplifiers, an output is connected to a gate terminal of the corresponding transistor, one input receives an output voltage connected to a source terminal of the corresponding transistor, and the other input receives a first reference voltage taken out between the corresponding continuous resistors.
Since a gate voltage of a transistor supplying currents in order to generate a predetermined power source voltage can be varied, when the output voltage varies from a predetermined value, the capability of supplying currents largely can be changed. Since a reference voltage of each differential amplifier is varied, a voltage region easily can be produced in which currents are not consumed, whereby it becomes possible to suppress consumption currents during an operation of the power source voltage generating circuit or abnormal variation of the production of the semiconductor circuit.
In the semiconductor integrated circuit of the present invention, it is preferable that among the differential amplifiers constituting the power source voltage generating circuit, an operating power source voltage of the first differential amplifier is driven by the second power source voltage having a higher value than the first power source voltage and the second differential amplifier or the third differential amplifier is driven by the first power source voltage. This is because the output voltage in which the differential amplifiers operate can be set widely by allowing the operating power sources of the differential amplifiers to be independent of those of the driving transistors.
In the semiconductor integrated circuit of the present invention, it is preferable that among the differential amplifiers constituting the power source voltage generating circuit, continuous k differential amplifiers (k is a natural number, nxe2x89xa7k) are driven by the second power source voltage having a higher value than the first power source voltage, and the remaining continuous differential amplifiers are driven by the first power source voltage. This is because the output voltage in which the differential amplifiers operate can be set widely by allowing the operating power sources of the differential amplifiers to be independent of those of the driving transistors.
In the semiconductor integrated circuit of the present invention, it is preferable that the power source voltage generating circuit has a voltage control unit capable of increasing a resistance in the first and fourth resistors. This is because the output voltage in which the differential amplifiers operate can be set widely by allowing the operating power sources of the differential amplifiers to be independent of those of the driving transistors. Since the output voltage can be set widely, an algorithm is described easily in a test program when setting of voltage due to resistance steps is used for the test program.
It is preferable that in the semiconductor integrated circuit of the present invention, the power source voltage generating circuit has a voltage control unit capable of increasing a resistance in the resistors disposed on both ends among n resistors connected in series to one another. In the semiconductor integrated circuit of the present invention, it is preferable that the voltage control unit is composed of m fuses (m is a natural number) and m resistors in which the m fuses are connected in parallel to both ends, and in the adjoining resistors, a resistance of the output side is twice as high as that of the input side. This is because the output voltage in which the differential amplifiers operate can be set widely by allowing the operating power sources of the differential amplifiers to be independent of those of the driving transistors. Since the output voltage can be set in a wider range, an algorithm is described easily in a test program when the setting of voltage due to resistance steps is used for the test program.
In the semiconductor integrated circuit of the present invention, it is preferable that the power source voltage generating circuit has control terminals capable of stopping power supply to all of the n differential amplifiers. The reason for this is as follows. A test becomes possible while stopping the power source voltage generating circuit, and a functional test is conducted in advance by turning on an external power source, whereby the power source voltage generating circuit needs to operate only in acceptable products, and there is no need for testing all circuits. As a result, the test cost can be reduced.
In the semiconductor integrated circuit of the present invention, it is preferable that the third differential amplifier has the second control terminal, which is connected to the gate terminal of the transistor that is connected in parallel to the current source of the third differential amplifier. By providing a unit for changing the capability of the differential amplifiers temporarily in the circuit, the following circumstance can be prevented previously: supply of the voltages cannot catch up with the number of the activating circuit blocks (becomes insufficient) in a state in which an internal operation requiring the capability of providing a power source varies, e.g., in a state in which the number of the activated circuit blocks increases, so that the consumption of currents of the entire circuit can be reduced.
In the semiconductor integrated circuit of the present invention, it is preferable that the power source voltage generating circuit has the first resistor, the second resistor, the third resistor, and the fourth resistor connected in series to one another, the first differential amplifier, the second differential amplifier, and third differential amplifier, and the first transistor, the second transistor, and the third transistor. The first resistor connects the terminal on the opposite side of that connected to the second resistor to the first power source potential, and the fourth resistor connects the terminal on the opposite side of that connected to the third resistor to the ground potential. The gate terminals of the first transistor, the second transistor, and the third transistor are connected to the output terminals of the first differential amplifier, the second differential amplifier, and the third differential amplifier respectively. The drain terminals of the first transistor, the second transistor, and the third transistor are connected to either the first power source potential or the ground potential. The source terminals of the first transistor, the second transistor, and the third transistor are connected to the output terminal, one input terminal of each of the first differential amplifier, the second differential amplifier, and the third differential amplifier receives the output of the power source voltage generating circuit, the other input terminal of the first differential amplifier receives the first reference voltage produced between the first resistor and the second resistor, the other input terminal of the second differential amplifier receives the second reference voltage produced between the second resistor and the third resistor, and the other input terminal of the third differential amplifier receives the third reference voltage produced between the third resistor and the fourth resistor. Not only a voltage is detected immediately below the power source voltage, but also the operation of the power source circuit can be controlled after checking the power source supply of the entire semiconductor integrated circuit. Even when the entire semiconductor integrated circuit becomes large in scale, a problem of insufficient supply of the power source is solved, and restricted matters can be eased, when the power source voltage generating circuit is adopted.
It is preferable that the semiconductor integrated circuit of the present invention includes wiring for distributing the power source voltage provided from the power source voltage generating circuit to the entire circuit and wiring for measuring a voltage from the farthest position in the provided power source voltage independently, wherein in the power source voltage generating circuit, one input terminal of each of the first differential amplifier, the second differential amplifier, and the third differential amplifier is connected to the end portion of the wiring for measuring the power source voltage. Not only a voltage is detected immediately below the power source voltage, but also the operation of the power source circuit can be controlled after checking power source supply of the entire semiconductor integrated circuit. Even when the entire semiconductor integrated circuit becomes large in scale, a problem of insufficient supply of the power source is solved, and restricted matters can be eased, when the power source voltage generating circuit is adopted.
The method of testing a semiconductor integrated circuit of the present invention is characterized by stopping the power source voltage generating circuit, testing all circuits by supplying a voltage equal to that of the power source voltage generating circuit from an outside, controlling voltages of the circuits that are determined as acceptable products as a result of the test of all circuits, and testing a function of the entire semiconductor integrated circuit by operating the power source voltage generating circuit.
According to the construction described above, a test becomes possible while stopping the power source voltage generating circuit, and a functional test is conducted in advance by turning on an external power source, whereby the power source voltage generating circuit needs to operate only in acceptable products, and there is no need for testing all circuits. As a result, the test cost can be reduced.